As operating voltages are reduced for semiconductor devices, the amount of gate overdrive (V.sub.gs -V.sub.t) decreases because V.sub.t must be maintained sufficiently high to meet the off-current requirements imposed by the desired standby power for the device. For example, by way of illustration, reducing the operating voltages makes it increasingly difficult to write a usable signal into a dynamic random access memory (DRAM) storage capacitor because of the non-scalability of threshold voltage, due to the limiting affects of sub-threshold slope and substrate sensitivity. For a given temperature, sub-threshold slope is limited by the physics of carrier transport over the source-channel potential barrier. Given a required I off, sub-threshold slope determines V.sub.t. Thus minimum V.sub.t is constrained or restricted.
Due to the non-scalability of V.sub.t, to meet the device off-current objective, the percentage that the word line must be boosted above the power supply is greater than it was for earlier generations. Accordingly, the minimum gate oxide thickness is constrained by reliability considerations. Using thicker than desired gate oxide layers results in device performance penalties for the array device, as well as for the support devices.
More recently, SOI structures had been suggested for low-voltage DRAM applications because of improved sub-threshold slope and reduced back bias sensitivity. In particular, by simultaneously driving the gate and body of a SOI device, dynamic V.sub.t operation can be maintained. In other words, as the gate voltage is ramped up, the back bias on the MOSFET decreases, resulting in a lowering of the threshold voltage. Thus, relatively high current drive may be obtained in combination with low off-current. However, prior art suggestions of body-driven dynamic V.sub.t MOSFETs has been achieved by bringing the body to gate contact out adjacent to the active device, which results in using valuable substrate real estate. Furthermore, floating body leakage mechanisms present a very serious challenge to achieving the desired data retention time. In particular, see Mandelman et al, "Floating-Body Concerns for SOI Dynamic Random Access Memory (DRAM)", IEEE SOI Conference Proceedings, 1996, pp. 136-137.
It would therefore be desirable to provide a low V.sub.t during write back while meeting the off-current objective for a device along with overcoming the leakage problems associated with prior SOI devices.